Synchronized multichannel universal serial bus

ABSTRACT

The invention provides a method and apparatus for providing a synchronized multichannel universal serial bus, the method in one aspect comprising supplementing the signal channels in the USB specification to provide synchronization information from an external source, and in another aspect comprising observing USB traffic and locking a local clock signal of a USB device to a periodic signal contained in USB data traffic, wherein the locking is in respect of phase and/or frequency.

CROSS REFERENCE TO RELATED APPLICATIONS

This application is a divisional of application Ser. No. 11/271,799,filed Nov. 14, 2005 and now U.S. Pat. No. 8,285,897; which is adivisional of application Ser. No. 10/620,769, filed Jul. 17, 2003, nowU.S. Pat. No. 7,539,793; which claims benefit of provisional ApplicationNo. 60/396,099, filed Jul. 17, 2002 (all of which are herebyincorporated by reference.)

FIELD OF THE INVENTION

The present invention relates to a method and apparatus forsynchronizing Universal Serial Bus (USB) devices, of particular but byno means exclusive application in synchronizing USB devices connected toa USB host with respect to each other and to an arbitrary precisedegree.

BACKGROUND OF THE INVENTION

The USB specification is intended to facilitate the interoperation ofdevices from different vendors in an open architecture. USB data isencoded using differential signalling (viz. two wires transfer theinformation) in the form of the difference between the signal levels ofthose two wires. The USB specification is intended as an enhancement tothe PC architecture, spanning portable, desktop and home environments.

By way of example, FIG. 1 is a schematic diagram of an illustrativeprior art USB device 10 including a digitally controlled transducer 12.The device 10 includes a bus connector 14, digital I/O bus transfercircuitry 16, a microprocessor 18, and synchronization channel 20 forpassing synchronization information including trigger and clock signalsto the transducer 12.

The device 10 is connected by means of the bus connector 14 to a digitalbus 22 containing USB and synchronization signals.

The USB specification implicitly assumes that all devices are different.While this is true for the intended environments, which connect devicesfrom a multiplicity of manufacturers, there exist other environments(such as certain common industrial or laboratory environments) thatrequire a specification for operating multiple devices of a similarnature in a synchronized manner. The specification does not sufficientlyaddress this issue. Such environments are typically those where testing,measuring or monitoring is performed, which may require the devices tobe synchronized to a more accurate degree than is specified. The USBspecification allows limited inter-device synchronization by providing a1 kHz clock signal to all devices. However, many laboratory andindustrial environments require synchronization at MHz frequencies andabove.

Referring to FIG. 2, USB employs a tiered star topology 24, where hubs26 provide attachment points for USB devices 28. The USB host controller30 contains the root hub, which is the origin of all USB ports in thesystem. The root hub provides a number of USB ports to which USBfunctional devices or additional hubs may be attached.

In turn, one can attach more hubs (such as USB composite device 32) toany of these ports, which then provide additional attachment points viaports for further USB devices 34. In this way, USB allows a maximum of127 devices (including hubs) to be connected, with the restriction thatany device may be at most 5 levels deep.

The root hub in the host transmits a Start of Frame (SOF) signal packetevery 1.0 ms to every device, the time between two SOF packets beingtermed a frame. Each module receives this SOF packet at a differenttime, allowing for electrical delays inherent to USB topology. Thetopology implies that there may be a significant time delay (specifiedas at most 380 ns) for receiving the same signal between a device thatis connected directly to the host controller and a device, which is 5levels down. This is a severe restriction when there is a need tosynchronize devices at MHz levels and above.

Current synchronization between a USB host and a USB device is possibleby two types of USB transfers, Interrupt and Isochronous. Interrupttransfers allow guaranteed polling frequencies of devices with minimumperiods of 125 μs, whereas Isochronous transfers guarantee a constanttransfer rate. Both methods require there to be traffic between thedevice and host for synchronization to take place and therefore reservemore bandwidth for higher degrees of synchronization. This unfortunatelymeans that the available USB bandwidth can be used up before the maximumnumber of devices has been connected. This approach also places on thehost the great computational burden of keeping 127 devices synchronizedto the host by means of software, yet still fails to address maintainingsynchrony between the devices as to the host the individual devicesrepresent separate processes.

Devices that contain a physical transducer of some kind, such as a laserdiode or a photodetector, may require clock and trigger information.Such devices, such as a laser diode with a modulated light output at 1MHz, may use a clock signal to perform transducer functions at regularintervals or at a constant frequency. A trigger signal is usually usedto start or end an operation at a set time. In the laser diode example,a trigger signal could be used to turn the modulated light output on oroff.

These clock and trigger signals or information (referred to below assynchronization information) can be used to synchronize a multiplicityof devices to each other, provided the signals are common andsimultaneous to all devices. ‘Common’ and ‘simultaneously’ here meanthat the variation in time of these signals between the devices is lessthan a specified quantity, δt. In the laser diode example, this wouldenable a multiplicity of laser diodes to modulate their light output atone frequency. The modulation frequency of all devices would be thesame, and their waveforms would be in-phase. The current USBspecification (viz. 2.0) allows for delays in δt of up to 0.35 μs. For asignal with a frequency of 1 MHz and a period of 1.0 μs, this delayrepresents almost half of the period. It is thus unusable as specifiedas a synchronization signal for routine use.

Devices like hubs and USB controller chips commonly use some amount ofphase locking in order to decode the USB protocol. It is the purpose ofthe SYNC pattern in the USB protocol to provide a synchronizationpattern for another electronic circuit to lock to. However, this isintended to synchronize the device to the USB bit streams to an accuracysufficient to interpret MHz bit streams. It is not intended tosynchronize two separate devices with each other to an accuracy requiredby many test and measurement instruments. The USB specification—to theextent that it deals with inter-device synchronization—is mainlyconcerned with synchronizing a USB-CD audio stream sufficiently foroutput on a USB-speaker pair. The requirements of such an arrangementare in the kHz range and, for this, the USB provides ideal conditions.However, the specification does not address the potential problems ofsynchronizing 100 USB-speaker pairs.

U.S. Pat. No. 6,343,364 to Leydier et al. discloses an example offrequency locking to USB traffic, which is directed toward a smart cardreader. This patent teaches a local, free-running clock that is comparedto USB SYNC and packet ID streams; its period is updated to match thisfrequency, resulting in a local clock with a nominal frequency of 1.5MHz. This provides a degree of synchronization sufficient to read thesmart card information into the host PC. As this approach is directed toa smart card reader, inter-device synchronization is not addressed.Further, neither a frequency lock to 1 kHz or better stability nor highaccurate phase control is disclosed.

U.S. Pat. No. 6,012,115 to Chambers et al. addresses the USB start offrame (SOF) periodicity and numbering for timing. As explained in theAbstract of U.S. Pat. No. 6,012,115, the disclosed invention allows acomputer system to perform an accurate determination of the moment intime a predetermined event occurred within a real-time peripheral deviceby using the start of frame pulse transmitted from a USB host controllerto peripheral devices connected to it.

U.S. Pat. No. 6,092,210 to Larky et al. discloses a method forconnecting two USB hosts for the purpose of data transfer, by employinga USB-to-USB connecting device for synchronizing local device clocks tothe data streams of both USB hosts. Phase locked loops are used tosynchronize local clocks and over-sampling is used to ensure that dataloss does not occur. This document, however, relates to thesynchronization of two USB hosts with each other (and with limitedaccuracy), not to the synchronization of a multiplicity of USB devicesto a single USB host.

The USB specification was written with audio applications in mind, andU.S. Pat. No. 5,761,537 to Sturges et al. describes how to synchronizetwo or more pairs of speakers with individual clocks, where one pairoperates off a stereo audio circuit in the PC and the other pair iscontrolled by the USB. Since both speaker pairs use their own clocks,they need to be synchronized so this document teaches one technique formaintaining synchronization of the audio signals despite possible clockskew between the asynchronous clocks.

Although the above is not intended to be exhaustive or to describe thecommon general knowledge in this area, it is clear that there aredeficiencies in the current art.

SUMMARY OF THE INVENTION

Thus, it is an aim of this invention to supplement the USB specificationby implementing mechanisms which allow any number of USB devices, up tothe maximum allowed, to operate in a synchronized and triggered mannerwithout placing a great computational burden on the host. This frees thehost for other tasks such as control, data transfer, logging andanalysis.

In addition to supplementing the USB specification, the presentinvention also has all the advantages of USB, such as the ability tooperate multiple devices via a tree architecture (up to a current totalof 127 devices), hot-swap ability, auto-enumeration, ease-of-use,cross-operating system compatibility, and portability.

The present invention provides a method and apparatus for synchronizingUSB devices connected to a USB host with respect to each other. Thepresent invention also provides a back plane that supplies commonconnection points and combinations of one or more of power, USB andsynchronization signals to a variety of similar USB devices.

Specifically, the invention provides, in a first broad aspect, a methodof providing a synchronized multichannel universal serial bus involvingsupplementing the wires (or equivalent—possibly wireless—signalchannels) in the USB specification to provide synchronizationinformation from an external source.

Preferably said synchronization information includes a trigger signaland a clock signal.

Thus, by providing such information from an external source,synchronization information can be provided at essentially arbitraryfrequencies.

In a second broad aspect, the invention provides a synchronizedmultichannel universal serial bus comprising circuitry to observe USBtraffic and to lock a local clock signal of a USB device to a periodicsignal contained in USB data traffic.

Preferably the circuitry is adapted to lock said local clock signal tosaid periodic signal in phase, in frequency, or in both phase andfrequency.

Preferably said circuitry is operable to decode and lock to USB Start ofFrame (SOF) packet tokens (or other periodic data structure).

The invention also provides a method of synchronizing a multichanneluniversal serial bus, comprising:

observing USB traffic; and

locking a local clock signal of a USB device to a periodic signalcontained in USB data traffic;

wherein said locking is in respect of phase, of frequency, or of bothphase and frequency.

In a third broad aspect, the invention provides a synchronizedmultichannel universal serial bus having circuitry to observe the USBtraffic at a plurality of points in a USB tree and to measure a roundtrip time of each of a plurality of individual packets, to obtainrelative phases of individual USB devices in said tree.

Preferably said circuitry is operable to measure the roundtrip time ofan ACK packet associated with a particular transaction, whereby therelative phase of each device's local clock can be controlled so thatall attached USB devices can be synchronized.

The invention also provides a method of synchronizing a multichanneluniversal serial bus, comprising:

observing USB traffic at a plurality of points in a USB tree;

measuring a round trip time of each of a plurality of individualpackets; and

determining relative phases of individual USB devices in said tree fromsaid respective round trip times;

whereby any phase offsets of said respective individual USB devices canbe adjusted according to said determined relative phases.

In a fourth broad aspect, the invention provides a method of providing asynchronized multichannel universal serial bus comprising:

issuing all devices in a USB topology with a trigger signal.

Preferably the trigger signal synchronously initiates or ceasesoperations on a plurality of devices.

Preferably said trigger signal is produced by using an SOF packet(preferably including encoded frame number), to trigger a transducer ata given time.

Preferably the method includes executing said operation in phase with alocal oscillator.

This is preferred because, owing to the USB connection topology, thearrival times of the SOF packet can differ between devices and, inaddition, the USB specification allows for significant temporal jitterin the SOF packet frequency with respect to the phase-locked localoscillator. This can result in the clock being out of phase by afraction of a cycle.

The invention also provides a synchronized multichannel universal serialbus, comprising:

circuitry for issuing all devices in a USB topology with a triggersignal.

In a fifth broad aspect, the invention provides a synchronizedmultichannel universal serial bus including circuitry and logic tosupply synchronization signals to USB devices at frequencies thatcorrespond to national standards (such as NIST and NATA).

Indeed, this approach can be employed with the other aspects of thisinvention.

In a sixth broad aspect, the invention provides a synchronizedmultichannel universal serial bus including a USB back plane to provideto attachable devices any one or more of USB signals, power, sockets andsynchronization information.

The bus may also provide a mechanically supportive structure.

Combinations of these aspects to synchronize devices to each other arealso possible. Requirements of temporal accuracy, cost and ease-of-usemay place restrictions on which of these methods can be used for acertain application. In addition, apparatuses according to the inventioncan be embodied in various ways. For example, such devices could beconstructed in the form of multiple components on a PCB, or at thesemiconductor level, that is, as a single silicon (or othersemiconductor material) chip.

Thus, the invention also provides a method for locking the local clockof each of a plurality of USB devices within the same USB tree tosubstantially the same frequency, comprising:

generating or designating specific signal structures for transmission inthe USB data traffic;

transmitting said specific signal structures to said USB device in apredefined sequence;

monitoring USB signals local to said USB device for said specific signalstructures;

generating a local reference signal at each of said USB devices fromsaid specific signal structures; and

locking the frequency of said local clock signal at each of said USBdevices to said local reference signal to a predetermined degree.

Preferably the specific signal structures are the USB Start of Framepacket token sequences as defined in the USB specification.Alternatively, the specific signal structures are command sequences sentto the USB device or data sequences sent to the USB device.

Preferably the method further includes generating said local referencesignal for each of said specific signal structures.

Preferably the method further includes generating said local referencesignal for substantially all of said specific signal structures.

Preferably the local clock frequency is substantially the same as saidlocal reference signal frequency.

Preferably the locking of each of said local clock signals to saidreference signal is for the purpose of generating a frequency with astability better than that required for pure transfer of data between ahost and a respective USB device.

Preferably the method further includes passively synchronizing said USBdevices to an arbitrary degree by attachment said USB devices to acommon USB hub by cables of substantially equal length.

The invention still further provides a method of measuring thepropagation time of signals from a USB host to a USB device within a USBtree, comprising:

designating a master USB device in said USB tree;

generating or designating specified signal structures for transmissionin the USB data traffic;

transmitting said specified signal structures to said USB device in apredefined sequence;

monitoring said USB traffic by means of said master USB device for saidspecified signal structures and for specified response signals from saidUSB device;

generating event triggering signals local to said master USB devicecorresponding to decoding of said specified signal structures;

generating event triggering signals local to said master USB devicecorresponding to decoding of response signals from said USB device;

measuring a time interval between said event triggering signals in saidmaster USB device; and

determining a propagation time from said USB host to said USB devicefrom said time interval.

Preferably the master USB device is attached near the top of said USBtree.

Preferably the method further includes transmitting said specifiedsignal structures to said USB device in said predefined sequence.

Preferably the specified signal structures comprise OUT tokens, INtokens, ACK tokens, NAK tokens, STALL tokens, PRE tokens, SOF tokens,SETUP tokens, DATA0 tokens, DATA1 tokens, or programmable sequences bitpatterns in the USB data packets.

Preferably the USB device is one of a plurality of USB devices, and saidmethod includes determining a respective propagation time for each ofsaid USB devices including statistically analyzing a plurality of suchpropagation determinations to improve accuracy of said propagation delaymeasurement.

The present invention yet further provides a method of determining therelative propagation delay of electrical signals or data structuresbetween a plurality of USB devices connected to a common USB host,comprising:

determining respective propagation delays between each of said USBdevices and said USB host according to the method described above;

designating one of said USB devices as a temporal reference device; and

determining the difference in said propagation delay between saidtemporal reference device and each of said plurality of said USBdevices.

The present invention also provides a method of synchronizing the localclocks of each of a plurality of USB devices connected to a common USBhost via a USB tree so that said clocks are substantially in phase andat substantially the same frequency, comprising:

locking the local clock of each of said USB devices to substantially thesame frequency according to the method described above;

determining the relative propagation delay of signals from said USB hostto each of said USB devices with respect to a selected one of said USBdevices according to the method described above, said selected one ofsaid USB devices designated a reference USB device;

determining the relative phase of said local clock of each of saidplurality of USB devices with respect to said local clock of saidreference USB device according to the method described above;

determining the temporal adjustment or phase offset of each of saidlocal clocks required to result in said plurality of local clocks acrosssaid USB tree being substantially in phase;

transmitting said temporal adjustment or phase offset from said USB hostto said USB devices; and

providing phase adjustment of said local clock on each of said USBdevices according to said temporal adjustment or phase offsetrespectively.

Preferably each of the local clocks of at least some of said USB devicesare shifted in phase by a desired amount, resulting in an array of USBdevices with local clocks of known relative phases.

In addition, the present invention provides a method for synchronouslytriggering and thereby initiating or stopping one or more processes on aplurality of USB devices connected to a common USB host according to apredefined trigger command, comprising:

synchronizing the local clocks of each of said USB devices according tothe method described above;

transmitting a predetermined trigger request signal and a predeterminedtrigger command signal in the USB data traffic, indicative respectivelyof a trigger request and of said trigger command;

monitoring said USB data traffic local to each of said USB devices forsaid trigger request signal and for said trigger command signal;

sending an initiating trigger request signal by means of said USB hostto each of said USB devices to prepare said USB devices to execute saidtrigger request at substantially the same time;

configuring said USB devices to respond to said initiating triggerrequest signal by preparing themselves to perform said processes onreceipt said trigger signal;

configuring said USB host to issue said trigger command to each of saidplurality of said USB;

decoding said trigger command by means of said USB devices;

configuring said USB devices to execute said processes at substantiallythe same time; and

whereby one or more processes within said USB devices can be initiatedor stopped upon receipt of said trigger command signal from said USBhost.

Preferably the trigger request signal comprises any of the USB packetsignal structures defined in the USB specification, command sequencessent to the USB device, or data sequences sent to the USB device.

Preferably the method includes transmitting said trigger request signaland said trigger command signal in a predetermined sequence.

Preferably the trigger command signal comprises any of the USB packetsignal structures defined in the USB specification, command sequencessent to the USB device, or data sequences sent to the USB device.

Preferably the local USB decoding device is a microcontroller, amicroprocessor, a field programmable gate array or any other elementcapable of decoding data structures within said USB.

Each of the trigger request signal and the initiating trigger requestsignal preferably comprises OUT tokens, IN tokens, ACK tokens, NAKtokens, STALL tokens, PRE tokens, SOF tokens, SETUP tokens, DATA0tokens, DATA1 tokens, or programmable sequences bit patterns in the USBdata packets.

Preferably the trigger command is encoded into said USB traffic using asignal protocol defined within the USB specification.

Preferably each of said USB devices receives a clock signal from anexternal source.

Preferably the clock signals are received through an additionalelectrical or optical connector, or through wireless means.

The present invention further provides an apparatus for locking thelocal clock of each of a plurality of USB devices within the same USBtree to substantially the same frequency, comprising:

a signal generator for generating specific signal structures in the USBdata traffic, for transmitting said specific signal structures to saidUSB device in a predefined sequence, and for generating a localreference signal at each of said USB devices from said specific signalstructures; and

a signal monitor for monitoring USB signals local to said USB device forsaid specific signal structures;

whereby said frequency of said local clock signal at each of said USBdevices can be locked to said local reference signal to a desireddegree.

The present invention also provides an apparatus for measuring thepropagation time of signals from a USB host to a USB device within a USBtree, comprising:

a master USB device comprising one of the USB devices in said USB tree;

a signal generator or root hub for generating specified signalstructures in the USB data traffic, for transmitting said specifiedsignal structures to said USB device in a predefined sequence;

a signal monitor for monitoring said USB traffic by means of said masterUSB device for said specific signal structures and for said responsesignals; and

a timer for measuring a time interval between said event triggeringsignals in said master USB device; and

whereby a propagation time from said USB host to said USB device can bedetermined from said time interval.

Still further, the invention provides an apparatus for determining therelative propagation delay of electrical signals or data structuresbetween a plurality of USB devices connected to a common USB host,comprising:

an apparatus for determining respective propagation times between eachof said USB devices and said USB host as described above; and

computing means for determining the difference in said propagation timesbetween a reference USB device and each of said plurality of said USBdevices.

wherein said reference USB device comprises one of said USB devices.

The invention in one embodiment provides an apparatus for synchronizingthe local clocks of each of a plurality of USB devices connected to acommon USB host via a USB tree so that said clocks are substantially inphase and at substantially the same frequency, comprising:

an apparatus for locking said local clock of each of said USB devices tosubstantially the same frequency as described above;

an apparatus for determining the relative propagation delay of signalsfrom said USB host to each of said USB devices with respect to areference USB device and for determining the relative phase of saidlocal clock of each of said plurality of USB devices with respect tosaid local clock of said reference USB device as described above, saidreference USB device comprising a selected one of said USB devices; and

a timer for determining the temporal adjustment or phase offset of eachof said local clocks required to result in said plurality of localclocks across said USB tree being substantially in phase;

wherein said apparatus is adapted to transmit said temporal adjustmentor phase offset from said USB host to said USB devices and to providephase adjustment of said local clock on each of said USB devicesaccording to said temporal adjustment or phase offset respectively.

BRIEF DESCRIPTION OF THE DRAWINGS

In order that the present invention may be more clearly ascertained,embodiments will now be described, by way of example, with reference tothe accompanying drawing, in which:

FIG. 1 is a schematic diagram of an illustrative prior art USB device;

FIG. 2 is a schematic diagram of a prior art USB tiered star topology;

FIG. 3 is a schematic diagram of a synchronized USB circuit according toa first embodiment of the present invention, in which synchronizationinformation is passed to a device;

FIG. 4 is a schematic diagram of a synchronized USB circuit according toa second embodiment of the present invention, in which USB traffic isobserved and the USB device's local clock signal is locked to the USBSOF packet in phase and frequency;

FIG. 5A is a schematic diagram of a synchronized USB circuit accordingto a third embodiment of the present invention, in which the roundtriptime of an ACK packet associated with a particular transaction ismeasured to control the relative phase of the local clock of each of aplurality of devices;

FIG. 5B is a timing diagram for the transaction of FIG. 5A for device62;

FIG. 5C is a timing diagram for the transaction of FIG. 5A for device60.

FIG. 6 is a schematic diagram of a synchronized USB circuit according toa fourth embodiment of the present invention, in which circuitry isprovided for spying on a USB and locking the signal from a local clockto a SOF packet of USB in phase and frequency;

FIG. 7 is a simplified schematic diagram of one example of asynchronized USB circuit according to a combination of embodiments ofthe present invention, where synchronization is provided withoutadditional connector wiring;

FIG. 8 is a schematic diagram of a complex synchronized USB circuitcombining a plurality of embodiments of the present invention, wheresynchronization is provided without additional connector wiring;

FIG. 9 is a simplified schematic diagram of another example of asynchronized USB circuit according to a combination of embodiments ofthe present invention, where synchronization is obtained with the use ofadditional connector wiring;

FIG. 10 is a simplified schematic diagram of a further example of asynchronized USB circuit according to a combination of embodiments ofthe present invention, comparable to but more complex than that of FIG.8; and

FIG. 11 is a simplified schematic diagram of a variation of the exampleof FIG. 10.

DESCRIPTION OF THE PREFERRED EMBODIMENTS OF THE INVENTION

According to a first embodiment of the invention, the synchronizationinformation is passed to the device. FIG. 3 is a schematic diagram of aUSB device 10′ (similar to that of FIG. 1, from which like referencenumbers are adopted to refer to like features) including a digitallycontrolled transducer 12. According to this embodiment, however, thenumber of wires is increased to include a channel for providingsynchronization information containing trigger and clock signals from anexternal source.

The synchronization information (including trigger and clock signals) isprovided from an external source 36 to the bus connector 14, so that thesynchronization information provided by synchronization channel 20 tothe transducer 12 includes the externally provided synchronizationinformation.

The device 10′ thus does not contain logic or circuitry to generatesynchronization information with regard to other devices.

USB communication is based on transferring data during regular 1 msintervals called frames. A start of frame (SOF) packet is transmitted toall but low speed devices at the beginning of each frame (hencerepetitively at 1 kHz) and therefore represents a low resolutionsynchronization signal for every device connected to one common USB portof the host. Thus, according to a second embodiment of the invention,the USB traffic is observed, and the USB device's local clock signal islocked to the USB SOF packet in phase and frequency.

As is well understood in the art, the USB specification defines severalunique data structures called TOKENS which are used as packet headersfor control and administration functions of the bus. The SOF packet hasa unique digital signature, and can therefore be distinguished fromother data, which may also be present on the bus. According to thisembodiment, a logic circuit or matched filter may be used to decode thesequence of bits by which an SOF TOKEN is represented and issue a timingsignal for every SOF packet present on the USB. Since the SOF occurs ata specified frequency and is common to all devices present, it and thedecoded timing signal, can be used by all devices as a common frequencyreference. In order to generate a frequency different to the 1 kHz ofthe SOF, a phase-locked loop (PLL) can be utilized to lock a localoscillator in frequency and phase to the SOF and timing signal. This hasthe added advantage, that the PLL can be used to average out jitter inthe SOF time of arrival. Therefore, the frequency of the localoscillator need not be different to that of the SOF packet.

Referring to FIG. 4, the method of this second embodiment employscircuitry to observe traffic through USB 40 and decode all SOF packets.The signal Φ from a local controlled oscillator clock 42 is locked tothe USB 1 kHz SOF packet in phase and frequency. This first requires thesignal Φ from clock 42 to be divided by a clock frequency divider 46down to the frequency of the SOF packet (e.g. from an output frequencyof 1 MHz down to 1 kHz); matched filter 48 sends a clock synch signal 50when a SOF packet arrives (nominally at 1 kHz), which passes to a phasedetector 52. The phase detector 52 is coupled to the controlledoscillator clock 42 via a filter 56.

The local clock signal Φ is subsequently supplied to the transducercircuitry on the USB device, thus ensuring all devices attached to theroot hub are locked in frequency.

According to this embodiment, it is possible to produce a clock signalstable to arbitrarily high frequencies, such as a clock frequency oftens of megahertz with stochastic jitter as low as a few nanoseconds.Thus, this embodiment allows one to ensure that the local clock of eachdevice connected to a given USB is synchronized in frequency. However,it does not consider the synchronicity of those clocks. Each clock willbe locked in frequency and phase to the receipt of the SOF TOKEN, buteach device will receive the SOF packet at a substantially differenttime owing to differences in the signal propagation time of a randomlyconnected USB star topology. Synchronization of the local clock of eachof a plurality of USB devices (such that all clocks are in phase)requires knowledge of said signal propagation time from the host to eachdevice.

According to a third embodiment, the local clocks of each of a pluralityof USB devices are synchronized to an arbitrary degree. The USB trafficis monitored at various attachment points in the USB tree and thepropagation times of specific USB communication transactions aremeasured, to obtain and compensate for the phase differences between thelocal clocks of different devices that are due to electronic and cabledelays. According to this embodiment, the roundtrip propagation time ofa specific data packet from Host to Device and the associated USBacknowledgement ACK TOKEN from the Device for each device present aremeasured. This information is used to control the relative phase of eachdevice's local clock, thereby synchronizing all attached USB devices toeach other to an arbitrary degree.

The USB specification allows the local time of two devices to differ byup to 380 ns. However, if two independent devices are to accuratelyrecord the real time of the same event, their local time must bedetermined to an effectively arbitrarily precise degree.

FIG. 5A depicts schematically two devices 60 and 62, which are attachedat different points in a USB chain 64. USB chain 64 also comprises a USBHost Controller 66 and multiple 7 port USB hubs 68. Devices 60 and 62will both receive the same periodic SOF signal to which they haveindependently locked their local clocks in frequency and phase. However,device 62 will receive the SOF packet later than device 60 owing to atopological time delay introduced by the greater number of USB hubs 68between USB Host Controller 66 and device 62. This temporal differenceneeds to be calculated from time delay measurements and corrected for.

The particular attachment point of device 60 is unimportant provided itis located such that it can decode Bus traffic for itself and device 62as shown by the symbol “A” on FIG. 5A (i.e. device 60 must be able todecode Bus traffic for all devices requiring synchronization). Theconnection point for device 60 is therefore preferably substantiallynear the top of the USB tree or chain, as shown in FIG. 5A.

In order to measure said round trip propagation time a USB transactionis conducted between the Host and device 62. Device 60 monitors USBtraffic at point “A” in the tree and detects the passage of both thedownstream and response data packets of the transaction. It is thenpossible for Device 60 to determine the period of time between detectionof the downstream signal from the Host to device 62 (beginning of thetransaction) and the response signal from device 62 to the Host (end ofthe transaction) at point “A” of FIG. 5A. In a preferable embodiment,the response signal from device 62 to the Host is an ACK TOKEN of atransaction acknowledgement ACK packet.

The round trip propagation time for a USB transaction between the Hostand device 60 relative to point “A” can be determined in a similarmanner. The connection topology based temporal phase shift between thefrequency locked clocks in device 60 and device 62 is then given bysubstantially half the difference in the round trip propagation time forthe two devices with respect to the same point “A”. The frequency lockedclock in device 62 is therefore phase delayed with respect to thefrequency locked clock in device 60 by this amount. In order tosynchronize the clocks in devices 60 and 62 in both frequency and phase,a phase offset corresponding to the said amount must be introduced intoone of the clocks. This is most achieved by introducing a phase delayinto the clock signal local to device 60.

FIGS. 5B and 5C further illustrate this approach. FIG. 5B is a timingdiagram for the transaction of FIG. 5A for device 62, while FIG. 5C is atiming diagram for the transaction of FIG. 5A for device 60. The USBtransaction starts for each device 60, 62 at T_(Start X) and ends whenthe device returns an ACK packet as shown by T_(ACK X) (where in bothcases X represents the device number). These transactions do not beginat the same time but the figures have been aligned with respect toT_(Start X) to show the relative duration of the transactions. Device 60is much closer to the detection point “A” in FIG. 5A, so the round trippropagation time is significantly shorter than that for device 62. Thedifference in propagation time is shown as ΔT. The phase offset betweenthe two frequency locked clocks is therefore given by ½ΔT.

It will be clear to the skilled person that there are other methods ofdetermining the required phase corrections. It will also be understoodby the skilled person that other USB data protocols may be used forgenerating local clock frequency and determining either the round tripor one-way propagation time, including but not limited to any of the USBcontrol and administration packet TOKENS (namely SOF, IN, OUT, ACK, NAK,PRE, STALL, DATA0, DATA1), any programmable sequences of bit patterns inthe USB data packets, any user defined data structure or any signalprotocol defined within the USB specification.

Above are described techniques for locking the local oscillators of USBdevices in phase and frequency to achieve synchronous operation of amultiplicity of USB devices. This local oscillator generates acontinuous modulation. The devices may also be required to synchronize aparticular sequence of operations in time. The devices will thereforeneed a so-called common trigger signal to achieve this. This triggersignal can be used in conjunction with the frequency-locked localoscillator to achieve complete, synchronous operation of multiple,independent USB devices.

According to a fourth embodiment, a synchronous trigger signal for atransducer on a given device is produced by using the SOF packetincluding the encoded frame number, to trigger a transducer at a giventime. However, owing to the USB connection topology, the arrival timesof the SOF packet can differ between devices and, in addition, the USBspecification allows for significant temporal jitter in the SOF packetfrequency with respect to the phase-locked local oscillator. This mayresult in the clock being out of phase by a fraction of a cycle.However, the trigger signal should be in-phase with the localoscillator.

To eliminate the problems of jitter the SOF signal is latched to thelocal oscillator. The latch registers the arrival of an SOF triggerrequest, but only produces a trigger signal when the local oscillatornext changes state. The error in trigger times between different devicesis a function of the device's local clock frequency and properties ofthe control loop and can be made arbitrarily small.

Thus, FIG. 6 is a schematic diagram of a circuit 70 for monitoring theUSB 72 and locking the clock signal Φ from a local clock 74 (with outputfrequency downshifted to 1 kHz—if necessary—by clock frequency divider76) to the 1 kHz SOF packet of USB 72 in phase and frequency. A firstmatched filter 80 sends a clock sync signal 82 when an SOF packetarrives in order to frequency and phase lock the local clock 74 (as inFIG. 4), while second matched filter 84 sends a trigger request signal86 when an SOF packet with a specific frame number arrives. Like thecircuit of FIG. 4, this circuit also includes a filter 90 and a phasedetector 92. The trigger request signal is latched to the localstabilized local clock signal Φ to produce the synchronized triggersignal “Trig”.

According to a fifth embodiment, circuitry and logic are used to supplysynchronization signals to USB devices at frequencies which aretraceable to national standards, such as NIST or NATA. This is achieved,for example, by replacing clocks and/or crystals in any of the hubs,including the root hub, with frequency references traceable to anational standard.

According to a sixth embodiment, a USB back plane is provided tosupply—attachable devices—power, USB signals, connectors andsynchronization information.

In its most complex state a USB back plane contains power additional toUSB, making for self-powered devices, hub circuitry to provide amultiplicity of ports, a plurality of connectors associated with thoseports providing a plurality of hot pluggable device attachment pointsand USB signals that satisfy the USB specification. It may also containlogic elements such as microprocessors, programmable arrays, and digitaland analogue electronics to regulate and provide synchronizationinformation including frequency, phase and trigger using varioustechniques described above, as well as power-on/off sequences. Inaddition to one or many hubs, a back plane can also contain devices thatare attached to one of the USB ports provided by the Hubs.Alternatively, it can be a composite device that provides hub andsynchronization functionality. In this way, synchronization informationis measurable and programmable on-the-fly.

EXAMPLES

The above described embodiments can be employed in a variety of ways.These, however, can be divided into devices that supplement the USBconnector terminals with synchronization terminals and those that donot. Additionally, the logic elements of the second to fifth embodimentscan be located either on the USB device, on the back plane (if a backplane solution is desired), on both, or not be present at all.

It will be understood that, depending on the requirements of theapplication, one may or may not want to implement the back planesolution. The application also determines if additional power needs tobe supplied to the devices.

Example 1 With No Additional Connector Wiring for Synchronization

The advantage of a system according to the present invention that doesnot depend on supplementary synchronization signals is that the devicesare not reliant on this information to work in a synchronized manner,and hence ordinary hubs can be used on any stand-alone host. Such asystem can be extended to devices that require very accuratesynchronization. Thus, an example of such a system is shown in FIG. 7generally at 96, with upstream USB port 98 and a plurality of back planehub devices 100, 102 (each, in this example, a 7-port USB hub on backplane 104), which may optionally supply additional power to a pluralityof devices 106. Each device 106 may contain a local clock that isfrequency and phase locked according to the above-described secondembodiment. The back plane 104 and the hubs 100, 102 have the ability totime phase differences between devices 106 (each with random cablelength according to the USB specification) by means of device 108 andthe techniques described above in the context of the third embodiment.Furthermore, each device 106 contains a phase shift generator for thelocal clock that operates according to the techniques described above inthe context of the third embodiment.

Example 2

A complex system comprising many synchronous USB devices is shown inFIG. 8 generally at 110. Upstream port 111 receives USB communicationfrom the Host. The system 110 includes a plurality of back planes 112,113, 114 each provided with two back plane hub devices 115. Each backplane hub devices 115 comprises a 7-port USB hub and may optionallysupply additional power to a plurality of devices 116. Each device 116may contain a local clock which is frequency and phase locked accordingto the above-described second embodiment. Further, first or master backplane 112 also has additional circuitry or logic elements 117 (as inFIG. 7), and has the ability to time phase differences between devices116 (each with different connection topology) by means of elements 117and the techniques described above in the context of the thirdembodiment. Furthermore each device 116 contains a phase shift generatorfor phase shifting the local clock using the techniques described abovein the third embodiment. There may be additional devices and/or hubsand/or back planes connected to downstream ports 118 up to the maximumnumber of 127 devices defined in the USB specification.

In addition, the frequency provided by an upstream root hub may begenerated by a frequency reference in accordance with the fifthembodiment and any trigger signals may be generated using the approachof the fourth embodiment.

Example 3 Additional Connector Wiring for Synchronization

The simplest example of such an approach according to theabove-described embodiments is achieved by connecting all devices to acommon synchronization signal either through a proprietary connectorcontaining USB and synchronization information or through a USBconnector, as well as a separate synchronization link. Thesynchronization information is independent of the USB traffic and cantherefore be of arbitrary frequency without any great difficulty. Themedium for the synchronization information can be any of wireless,electrical or fiber optic means. FIG. 9 depicts schematically apractical example of such a circuit at 120. The circuit 120 includes, ineffect, a pair of circuits each comparable to that of FIG. 7, so that 24USB devices 122 are connected via 7-port USB hubs 124; these in turn canbe connected to a PC via upstream USB ports 126. The USB connectiontopology has no influence on the synchronization signal, which issupplied separately to the devices by an external clock 128 of frequencyΦ. Thus, the devices 122 are connected to the USB and thesynchronization signal via either one connector (with connections inaddition to the USB requirements) or a standard USB connector plus oneor more additional connectors.

In a more complex form of this example, a back plane containingadditional logic elements is used, the logic elements providing accuratecontrol and lock in frequency and phase for all attached devices. Insuch an arrangement, the back plane logic elements observe USB trafficand generate their own local clock according to the approach of theabove-described second and third embodiments. This back plane generatedclock is then distributed to each attached USB Device through one ormore backplane connectors described above.

Referring to FIG. 10, therefore, which depicts such an arrangementgenerally at 130, each device 132 is connected to circuitry 134 throughadditional connector terminals 136 (electrical, wireless, fiber-optic),which supplement the USB specification. As an example, the circuitrycould be located on a back plane 138 to which the various modules areconnected. This back plane 138 also contains one or more 7-port USB hubs140. The circuitry 134 monitors the USB at USB upstream port 142 for astart of frame signal and locks the frequency and phase of its internalclock to this signal (as per the second embodiment). The circuitry 134can also arbitrarily delay the incoming clock signal, to account fordelays due to USB topology (cf. the third embodiment). The internalclock is then made available to each device 132 via the additionalconnector terminal. In this way, all devices 132 receive a common clocksignal to synchronize with.

It should be noted that in the previously described figures, thesynchronization circuitry is drawn separate to the hubs. In anothervariation, however, shown in FIG. 11 at 150, one hub is a compositedevice 152 (connected to USB upstream port 154), containing bothexpansion ports 156 and the synchronization circuitry 158 (whichgenerates local clock signals according to embodiment two and usingtechniques described in embodiment three to provide phase shift of thelocal clock to provide synchronization with other devices), which freesup a port 160 of second hub 162 (when compared to the examples discussedabove) so that—in the simple configuration shown in FIG. 11—up to 13devices 164 can be attached.

It should also be noted also that the USB specification does notrestrict the number of ports per hub to be seven. Hence in FIG. 10 therecould be one hub 140 that services, for example, 12 ports.

Modifications within the spirit and scope of the invention may bereadily effected by those skilled in the art. It is to be understood,therefore, that this invention is not limited to the particularembodiments described by way of example hereinabove. For the purposes ofthis specification it should be understood that the word “comprising”means “including but not limited to”, and that the word “comprises” hasa corresponding meaning.

Further, any reference herein to prior art is not intended to imply thatsuch prior art forms or formed a part of the common general knowledge.

1-35. (canceled)
 36. A method of providing a synchronized multichanneluniversal serial bus (USB), comprising: providing a plurality of USBdevices with USB signals from a universal serial bus and synchronizationinformation from a source external to said universal serial bus; passingsaid synchronization information to transducers of said plurality of USBdevices; synchronizing said transducers to each other using saidsynchronization information from said external source; observing USBtraffic at a plurality of points in a USB tree; measuring a round triptime of each of a plurality of individual packets; determining relativephases of individual USB devices in said USB tree from said respectiveround trip times; and adjusting any phase offsets of said respective USBdevices according to said determined relative phases; wherein saidsynchronization information from said external source is adapted for usein synchronizing said transducers of said plurality of USB devices toeach other; and said synchronization information is passed to thetransducers of said plurality of USB devices substantiallysimultaneously wherein substantially simultaneously is defined to bewithin a variation in time between said devices that is less than aspecified quantity δt.
 37. A method as claimed in claim 36, wherein saidsynchronization information includes a trigger signal and a clocksignal.
 38. A method as claimed in claim 36, comprising: observing USBtraffic; and locking a local clock signal of a USB device to a periodicsignal contained in said USB data traffic; wherein said locking is inrespect of phase, of frequency, or of both phase and frequency.
 39. Amethod as claimed in claim 36, further comprising issuing all USBdevices in a USB topology with a trigger signal.
 40. A method as claimedin claim 39, wherein said trigger signal synchronously initiates orceases operations on said USB devices.
 41. A method as claimed in claim39, further including producing said trigger signal by using a Start ofFrame packet, to trigger a transducer at a given time.
 42. A method asclaimed in claim 39, including executing said operation in phase with alocal oscillator.
 43. A synchronized multichannel universal serial bus(USB), comprising: a universal serial bus; an external source ofsynchronization information, said external source being external to saiduniversal serial bus, said synchronization information provided by saidexternal source being adapted to supplement the USB signals from saiduniversal serial bus and to be passed to respective transducers of aplurality of USB devices; and circuitry to observe USB traffic at aplurality of points in a USB tree and to measure a round trip time ofeach of a plurality of individual packets, to obtain relative phases ofindividual USB devices in said USB tree; wherein said synchronizedmultichannel universal serial bus is adapted to pass saidsynchronization information to said transducers, and saidsynchronization information is adapted to be used in synchronizing saidtransducers of said plurality of USB devices to each other, and whereinsaid synchronisation information is passed to the transducers of saidplurality of USB devices substantially simultaneously, whereinsubstantially simultaneously is defined to be within a variation in timebetween said devices that is less than a specified quantity δt.
 44. Auniversal serial bus as claimed in claim 43, wherein saidsynchronization information includes a trigger signal and a clocksignal.
 45. A universal serial bus as claimed in claim 43, wherein saidsynchronization information comprises a local clock signal of a USBdevice, and said universal serial bus comprises circuitry to observe USBtraffic and to lock said local clock signal to a periodic signalcontained in said USB data traffic.
 46. A universal serial bus asclaimed in claim 43, wherein said synchronisation information comprisesa local clock signal of a USB device, and said universal serial buscomprises circuitry to observe USB traffic and to lock said local clocksignal to said periodic signal contained in said USB data traffic inphase, in frequency, or in both phase and frequency.
 47. A universalserial bus as claimed in claim 45, wherein said circuitry is configuredto decode and lock to a periodic data structure.
 48. A universal serialbus as claimed in claim 43, wherein said circuitry is configured tomeasure the roundtrip time of an ACK packet associated with a particulartransaction, wherein said roundtrip time is usable in controlling therelative phase of the respective local clocks of said USB devices suchthat said USB devices are synchronized.
 49. A universal serial bus asclaimed in claim 43, comprising circuitry for issuing all devices in aUSB topology with a trigger signal.
 50. A universal serial bus asclaimed in claim 43, comprising circuitry and logic to supplysynchronization signals to USB devices at frequencies that correspond tonational standards.
 51. A universal serial bus as claimed in claim 43,comprising a USB back plane for providing to attachable devices any oneor more of USB signals, power, sockets and synchronization information.52. A system for providing real-time operation of one or more USBdevices at any USB expansion hub connection point within a USB tree,configured to perform the method of claim
 36. 53. A system as claimed inclaim 52, further providing real-time automated control and dataacquisition functions using the one or more USB devices.
 54. A system asclaimed in claim 52, further providing synchronous operation of the USBdevices.